World First

Edge AI Inference Acceleration

BitNet FPGA World First · RISC-V Full-Stack Self-Developed · 100% Domestic

The Core Problem We Solve

Export controls block high-end AI chips. Traditional edge solutions cost ¥600+ BOM (Jetson Nano) and rely entirely on imported chips facing supply chain disruption.

Hongyuan’s breakthrough: BitNet W1.58 ternary quantization replaces multiplication with addition/subtraction — enabling every ¥200-class domestic FPGA to run AI Transformer inference.

🌍 World First BitNet FPGA Accelerator
🔢 Zero-Error Verified 256/256 Matrix Match
🇨🇳 100% Domestic Anlogic FPGA + RISC-V + HarmonyOS
💰 Extreme Cost BOM <¥200, 70%+ below Jetson

Product Portfolio

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Smart Terminal AI Middleware

智能终端AI中间件
RISC-V + LiteOS 3-Tier Inference
  • ✅ Full AI system in 128KB SRAM
  • ✅ 3-tier progressive inference architecture
  • ✅ Zero-dependency smart CLI framework
  • ✅ Portable to any RISC-V/ARM MCU
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Key Metrics

16x Storage Compression
0 Error Matrix Computation
<¥200 Hardware BOM Cost
100% Domestic Component Rate
16,487 Lines of Self-Developed Code
6/6 Full-Chain Validation Pass

Explore Hongyuan Accelerator →  Explore Smart Terminal AI →  Contact Us →

Explore Products in Detail

Hongyuan Edge AI Inference Accelerator

World's first BitNet FPGA hardware accelerator · RISC-V + Anlogic FPGA + HarmonyOS LiteOS · 100% domestic · BOM <¥200

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Smart Terminal AI Middleware

Edge AI tiered inference platform based on RISC-V + LiteOS · Full AI in 128KB SRAM · 3-tier progressive inference architecture

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Ready to Build Next-Gen Edge AI Applications?

Contact us for dev boards, IP licensing or custom development services

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